1. Field of the Invention
The present invention relates to a metal-insulator-metal (MIM) capacitor structure, and more specifically, to a MIM capacitor structure with a copper electrode.
2. Description of the Prior Art
In semiconductor manufacturing processes, metal capacitors formed of metal-insulator-metal (MIM) are widely used in the design of the semiconductor devices. Because a MIM capacitor has low resistance and low parasitic capacitance, and has no problems in shifts of depletion induced voltage, MIM capacitors have become the main structure used for metal capacitors. It is therefore important to develop a MIM capacitor that comprises copper electrodes with low resistance.
Please refer to FIG. 1 and FIG. 2. FIG. 1 and FIG. 2 are schematic views of forming a metal capacitor 26 on a semiconductor wafer 10 according to the prior art. As shown in FIG. 1, the semiconductor wafer 10 includes a substrate (not shown), and a dielectric layer 12 positioned on the substrate. In the prior art method, a metal bottom plate, composed of a copper layer, is evenly formed on the surface of the dielectric layer 12. An insulation layer and another metal layer are then respectively deposited on the surface of the metal bottom plate 14. A lithographic process is performed to define the patterns of a metal upper plate 18, and the excess portions of metal layer and insulation layer are removed to form the inter-metal insulator (IMI) 16 and the metal upper plate 18 so as to finish the formation of the metal capacitor 26.
As shown in FIG. 2, an inter-metal dielectric (IMD) layer 20 covers the metal capacitor 26, and a chemical mechanical polishing (CMP) process is used to planarize the surface of the inter-metal dielectric layer 20. A photoresist layer (not shown) is coated on the surface of the inter-metal dielectric layer 20, and a lithographic process is performed to define the position of via holes 28. The excess portions of the photoresist layer are then removed, and a dry etching process is performed, using the residual photoresist layer as a mask. The inter-metal dielectric layer 20 that is not covered by the mask is removed so as to form the via holes 28. The residual photoresist layer is then stripped.
A sputtering process is performed to form a metal layer (not shown) that fills the via holes 28. Either an etching back process or a chemical mechanical polishing (CMP) process is then performed to remove portions of the metal layer, so as to make a surface of the metal layer in the via holes 28 aligned with a surface of the inter-metal dielectric layer 20, forming the via plugs 22. A metal layer (not shown) is then evenly deposited on the surface of the inter-metal dielectric layer 20, and an etching process is performed to form a metal wire 24 on top of the via plugs 22. The via plugs 22 are used to electrically connect the metal wire 24 and the metal capacitor 26.
However, the bottom plate 14 is composed of copper and therefore has poor adhesion ability to the IMI 16, leading to a peeling phenomenon occurred between the bottom plate 14 and the IMI 16. In addition, the upward diffusion and side diffusion of the copper ions in the bottom plate 14 respectively into the IMI 16 and the inter-metal dielectric layer 20 frequently occur and make the electrical performance of the metal capacitor 26 defective. Consequently, the product with the metal capacitor 26 formed by the method revealed in the prior art turns to be less competitive in the market due to the unreliable performance.
It is therefore a primary object of the present invention to provide a metal-insulator-metal (MIM) capacitor structure so as to prevent the diffusion of copper ions.
According to the claimed invention, the MIM capacitor structure comprises a copper layer, an alloy layer, a metal oxide layer and a top pad layer. The copper layer is formed within a dielectric layer on a substrate, and the alloy layer is formed on the copper layer. The metal oxide layer is positioned on the alloy layer with the top pad layer formed atop the metal oxide layer.
It is an advantage of the present invention against the prior art that a RTO process is performed to form the alloy layer on the copper layer. Simultaneously, the metal oxide layer, having excellent adhesion ability to the alloy layer, is formed on the alloy layer. The peeling phenomenon occurred between the metal bottom plate 14 and the IMI 16 in the prior art is therefore prevented. In addition, the alloy layer and the metal oxide layer are employed respectively as a first and a second copper-diffusion-preventing barrier layers. Both the side diffusion and the upward diffusion of the copper ions within the copper layer are therefore prevented. Consequently, the electrical performance and reliability of the MIM capacitor structure are properly assured.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the multiple figures and drawings.